Generally, in times of increasing digitalization, analog signals have to be digitized, for example, with the aid of sample-and-hold circuits which sample the respective analog signals at certain time intervals typically determined by the clock signal of a clock generator.
However, due to noise and other distortions, in relation to this reference clock source, deviations from true periodicity arise, which is called jitter. Therefore, jitter is a major characteristic value of sample-and-hold circuits, or respectively of systems applying such circuits, which leads to a growing need of a jitter measuring device and a jitter measuring method.
U.S. Pat. No. 6,640,193 B2 discloses jitter measuring based on signal-to-noise ratio (SNR) measurements. In this case, two measurements at two different frequencies, respectively amplitudes, or at two different phases are performed and then the respective SNR-difference is taken to get the jitter. Additionally, to remove the sampled signal, a Fourier transform, respectively a fast Fourier transform (FFT), is used, which leads to low sensitivity and error sources because, for instance, FFT leakage makes it impossible to zero-out all the appropriate bins in the FFT. As it can be seen, such jitter measurements are not only rather complex and therefore costly but also prone to errors.
Accordingly, there is a need to provide a measuring device and a measuring method for measuring jitter, on the one hand, in a simple and cost-effective manner, and on the other hand, with highest accuracy and best distortion robustness.